forked from forgejo/forgejo
Update Vendor (#16325)
* Add Dependencie Update Script * update gitea.com/lunny/levelqueue * update github.com/PuerkitoBio/goquery * update github.com/alecthomas/chroma * update github.com/blevesearch/bleve/v2 * update github.com/caddyserver/certmagic * update github.com/go-enry/go-enry/v2 * update github.com/go-redis/redis/v8 * update github.com/hashicorp/golang-lru * update github.com/klauspost/compress * update github.com/markbates/goth * update github.com/mholt/archiver/v3 * update github.com/microcosm-cc/bluemonday * update github.com/minio/minio-go/v7 * update github.com/olivere/elastic/v7 * update github.com/xanzy/go-gitlab * update github.com/yuin/goldmark
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319 changed files with 33568 additions and 21050 deletions
68
vendor/github.com/klauspost/cpuid/v2/cpuid.go
generated
vendored
68
vendor/github.com/klauspost/cpuid/v2/cpuid.go
generated
vendored
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@ -96,7 +96,9 @@ const (
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BMI2 // Bit Manipulation Instruction Set 2
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CLDEMOTE // Cache Line Demote
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CLMUL // Carry-less Multiplication
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CLZERO // CLZERO instruction supported
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CMOV // i686 CMOV
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CPBOOST // Core Performance Boost
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CX16 // CMPXCHG16B Instruction
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ENQCMD // Enqueue Command
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ERMS // Enhanced REP MOVSB/STOSB
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@ -106,6 +108,7 @@ const (
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GFNI // Galois Field New Instructions
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HLE // Hardware Lock Elision
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HTT // Hyperthreading (enabled)
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HWA // Hardware assert supported. Indicates support for MSRC001_10
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HYPERVISOR // This bit has been reserved by Intel & AMD for use by hypervisors
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IBPB // Indirect Branch Restricted Speculation (IBRS) and Indirect Branch Predictor Barrier (IBPB)
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IBS // Instruction Based Sampling (AMD)
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@ -117,18 +120,25 @@ const (
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IBSOPSAM // Instruction Based Sampling Feature (AMD)
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IBSRDWROPCNT // Instruction Based Sampling Feature (AMD)
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IBSRIPINVALIDCHK // Instruction Based Sampling Feature (AMD)
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INT_WBINVD // WBINVD/WBNOINVD are interruptible.
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INVLPGB // NVLPGB and TLBSYNC instruction supported
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LZCNT // LZCNT instruction
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MCAOVERFLOW // MCA overflow recovery support.
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MCOMMIT // MCOMMIT instruction supported
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MMX // standard MMX
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MMXEXT // SSE integer functions or AMD MMX ext
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MOVDIR64B // Move 64 Bytes as Direct Store
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MOVDIRI // Move Doubleword as Direct Store
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MPX // Intel MPX (Memory Protection Extensions)
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MSRIRC // Instruction Retired Counter MSR available
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NX // NX (No-Execute) bit
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POPCNT // POPCNT instruction
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RDPRU // RDPRU instruction supported
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RDRAND // RDRAND instruction is available
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RDSEED // RDSEED instruction is available
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RDTSCP // RDTSCP Instruction
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RTM // Restricted Transactional Memory
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RTM_ALWAYS_ABORT // Indicates that the loaded microcode is forcing RTM abort.
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SERIALIZE // Serialize Instruction Execution
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SGX // Software Guard Extensions
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SGXLC // Software Guard Extensions Launch Control
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@ -141,6 +151,7 @@ const (
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SSE4A // AMD Barcelona microarchitecture SSE4a instructions
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SSSE3 // Conroe SSSE3 functions
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STIBP // Single Thread Indirect Branch Predictors
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SUCCOR // Software uncorrectable error containment and recovery capability.
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TBM // AMD Trailing Bit Manipulation
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TSXLDTRK // Intel TSX Suspend Load Address Tracking
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VAES // Vector AES
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@ -194,7 +205,8 @@ type CPUInfo struct {
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Family int // CPU family number
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Model int // CPU model number
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CacheLine int // Cache line size in bytes. Will be 0 if undetectable.
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Hz int64 // Clock speed, if known, 0 otherwise
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Hz int64 // Clock speed, if known, 0 otherwise. Will attempt to contain base clock speed.
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BoostFreq int64 // Max clock speed, if known, 0 otherwise
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Cache struct {
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L1I int // L1 Instruction Cache (per core or shared). Will be -1 if undetected
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L1D int // L1 Data Cache (per core or shared). Will be -1 if undetected
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@ -363,25 +375,43 @@ func (c CPUInfo) LogicalCPU() int {
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return int(ebx >> 24)
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}
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// hertz tries to compute the clock speed of the CPU. If leaf 15 is
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// frequencies tries to compute the clock speed of the CPU. If leaf 15 is
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// supported, use it, otherwise parse the brand string. Yes, really.
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func hertz(model string) int64 {
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func (c *CPUInfo) frequencies() {
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c.Hz, c.BoostFreq = 0, 0
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mfi := maxFunctionID()
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if mfi >= 0x15 {
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eax, ebx, ecx, _ := cpuid(0x15)
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if eax != 0 && ebx != 0 && ecx != 0 {
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return int64((int64(ecx) * int64(ebx)) / int64(eax))
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c.Hz = (int64(ecx) * int64(ebx)) / int64(eax)
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fmt.Println("frequencies(): ", ecx, ebx, eax, "->", c.Hz)
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}
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}
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if mfi >= 0x16 {
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a, b, _, _ := cpuid(0x16)
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// Base...
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if a&0xffff > 0 {
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c.Hz = int64(a&0xffff) * 1_000_000
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}
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// Boost...
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if b&0xffff > 0 {
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c.BoostFreq = int64(b&0xffff) * 1_000_000
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}
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}
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if c.Hz > 0 {
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return
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}
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// computeHz determines the official rated speed of a CPU from its brand
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// string. This insanity is *actually the official documented way to do
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// this according to Intel*, prior to leaf 0x15 existing. The official
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// documentation only shows this working for exactly `x.xx` or `xxxx`
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// cases, e.g., `2.50GHz` or `1300MHz`; this parser will accept other
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// sizes.
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model := c.BrandName
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hz := strings.LastIndex(model, "Hz")
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if hz < 3 {
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return 0
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return
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}
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var multiplier int64
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switch model[hz-1] {
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@ -393,7 +423,7 @@ func hertz(model string) int64 {
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multiplier = 1000 * 1000 * 1000 * 1000
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}
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if multiplier == 0 {
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return 0
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return
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}
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freq := int64(0)
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divisor := int64(0)
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@ -405,21 +435,22 @@ func hertz(model string) int64 {
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decimalShift *= 10
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} else if model[i] == '.' {
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if divisor != 0 {
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return 0
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return
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}
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divisor = decimalShift
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} else {
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return 0
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return
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}
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}
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// we didn't find a space
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if i < 0 {
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return 0
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return
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}
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if divisor != 0 {
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return (freq * multiplier) / divisor
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c.Hz = (freq * multiplier) / divisor
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return
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}
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return freq * multiplier
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c.Hz = freq * multiplier
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}
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// VM Will return true if the cpu id indicates we are in
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@ -911,6 +942,7 @@ func support() flagSet {
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fs.setIf(ecx&(1<<29) != 0, ENQCMD)
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fs.setIf(ecx&(1<<30) != 0, SGXLC)
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// CPUID.(EAX=7, ECX=0).EDX
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fs.setIf(edx&(1<<11) != 0, RTM_ALWAYS_ABORT)
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fs.setIf(edx&(1<<14) != 0, SERIALIZE)
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fs.setIf(edx&(1<<16) != 0, TSXLDTRK)
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fs.setIf(edx&(1<<26) != 0, IBPB)
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@ -980,9 +1012,23 @@ func support() flagSet {
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}
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}
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if maxExtendedFunction() >= 0x80000007 {
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_, b, _, d := cpuid(0x80000007)
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fs.setIf((b&(1<<0)) != 0, MCAOVERFLOW)
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fs.setIf((b&(1<<1)) != 0, SUCCOR)
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fs.setIf((b&(1<<2)) != 0, HWA)
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fs.setIf((d&(1<<9)) != 0, CPBOOST)
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}
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if maxExtendedFunction() >= 0x80000008 {
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_, b, _, _ := cpuid(0x80000008)
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fs.setIf((b&(1<<9)) != 0, WBNOINVD)
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fs.setIf((b&(1<<8)) != 0, MCOMMIT)
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fs.setIf((b&(1<<13)) != 0, INT_WBINVD)
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fs.setIf((b&(1<<4)) != 0, RDPRU)
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fs.setIf((b&(1<<3)) != 0, INVLPGB)
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fs.setIf((b&(1<<1)) != 0, MSRIRC)
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fs.setIf((b&(1<<0)) != 0, CLZERO)
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}
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if maxExtendedFunction() >= 0x8000001b && fs.inSet(IBS) {
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